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為挑戰(zhàn)的系統(tǒng)設(shè)計提供信號高保真度
當(dāng)前高速電路使得信號路徑檢定和BER分析的挑戰(zhàn)性進(jìn)一步提高。由于的TDR帶寬、速的S參數(shù)測量功能及全面支持光學(xué)標(biāo)準(zhǔn)測試，DSA8200數(shù)字串行分析儀提供了完整的高速物理層測試平臺。
DSA8200采樣示波器概述
功能 | 優(yōu)點(diǎn) |
| 最多4個真實(shí)差分通道 | 利用真實(shí)的差分TDR激勵信號準(zhǔn)確地檢測非線性設(shè)備，如放大器。 |
| 高帶寬（50 GHz）時域反射儀 | 以12 ps 的入射級將阻抗不連續(xù)性分解至 1mm。 |
| 光學(xué)模塊噪聲低，光學(xué)靈敏度高，擁有消光比校準(zhǔn)功能及寬波長。 | 通過一個光學(xué)測試解決方案，滿足8.5Gb/s - 40Gb/s所有主要標(biāo)準(zhǔn)。 |
| IConnect® 信號完整性 | 利用集成的TDR和S參數(shù)測量減少由測試治具信號降級引起的測量錯誤。 |
| 串行數(shù)據(jù)網(wǎng)絡(luò)分析 (SDNA) | 通過一個儀器進(jìn)行時域和頻域分析來降低測試成本。準(zhǔn)確地分析信號通路以預(yù)測信號串?dāng)_和抖動，確?？煽康南到y(tǒng)運(yùn)行。 |
| 串行數(shù)據(jù)鏈路分析 (SDLA) | 通過抖動、噪聲和BER分析確定眼閉的準(zhǔn)確原因。通過快速評估各種FE/DFE均衡設(shè)置接收器的眼睜時間。 |
| 遠(yuǎn)程采樣頭 | 通過將TDR頭接近被測試設(shè)備來優(yōu)化信號保真度和最小化探頭、電纜及測試治具的影響。 |
Provide signal high fidelity for the most challenging system design
The current high speed circuit makes the signal path verification and BER analysis more challenging. Because of the highest TDR bandwidth, the fastest S parameter measurement function and the comprehensive support of optical standard test, DSA8200 digital serial analyzer provides a complete high-speed physical layer test platform.
DSA8200 sampling oscilloscope
Provide signal high fidelity for the most challenging system design
Today's high-speed design makes channel characterization and BER performance analysis more difficult than ever.
With the highest TDR (time domain reflectometer) bandwidth, the fastest S parameter measurement, and the most comprehensive analysis tools, DSA8200 digital serial analyzer provides a comprehensive solution to network and link analysis.
function
advantages
Up to 4 real difference channels use real difference TDR excitation signals to accurately detect non-linear devices such as amplifiers.
The high-bandwidth (50 GHz) time-domain reflector decomposes the impedance discontinuity to 1mm at an incident level of 12 ps.
IConnect? Signal integrity USES integrated TDR and S parameter measurements to reduce measurement errors caused by signal degradation of test fixture.
Serial data network analysis (SDNA) reduces test costs by using an instrument for time - and frequency-domain analysis.
Accurately analyze the signal path to predict signal crosstalk and jitter and ensure reliable system operation.
Serial data link analysis (SDLA) determines the exact cause of eye closure through jitter, noise and BER analysis.
By quickly evaluating the eye-opening time of various FE/DFE equalization Settings receiver.
The remote sampling head optimizes signal fidelity and minimizes the impact of probes, cables and test fixtures by bringing the TDR head close to the device being tested.
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